NanoSim (Synopsys)

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NanoSim™, an advanced circuit simulator for memory and mixed-signal verification, combines best-in-class simulation technologies from TimeMill® and PowerMill® to deliver an unparalleled combination of timing and power analysis and diagnostics in a single tool.

Offering a tight integration with Synopsys’ VCS™ Verilog Simulator, NanoSim is ideally suited to deliver high-speed, high-capacity verification of even the most complex A/D, large-memory System on a Chip (SoC) designs. NanoSim and VCS together address verification challenges at different levels of abstraction — RTL, gate and transistor level — and enable mixed-signal verification of complex SoCs. NanoSim further enables this flow by supporting Verilog-A, the industry-standard analog behavioral modeling language.

In addition, NanoSim’s revolutionary Hierarchical Array Reduction (HAR) technology delivers virtually unlimited capacity for memory verification.

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