Mentor Graphics addresses high-speed PCB design challenge with multi-lingual simulation support (Mentor Graphics)

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PCB DESIGN CONFERENCE EAST, BOXBOROUGH, Mass. - October 14, 2002 - Mentor Graphics Corporation, the market leader in printed circuit board (PCB) design software, today announced version 3.0 of the ICX™ signal integrity solution, the first PCB signal integrity tool to support SPICE, IBIS and VHDL-AMS in a single simulation environment. ICX 3.0 leverages Mentor’s ADVance MS™ (ADMS) simulation technology enabling users to employ signal integrity models created in multiple languages simultaneously for full board-level verification with improved flexibility and accuracy and shortened design times.

Created to address the signal integrity and timing challenges caused by higher clock frequencies and signal edge rates of high-speed, digital PCBs, ICX 3.0 makes simulation more efficient and accurate. This solution allows system designers to shorten design times and improve system performance and also gives IC vendors more behavioral modeling options for their devices. Mentor Graphics also announced the Tau® 3.0 product, the latest version of the company’s powerful board-level timing solution, which now offers greater integration with ICX.

Today’s complex, high-speed PCBs include devices with increasingly innovative buffer technologies. The lack of available, accurate models for these devices increases the difficulty in performing signal integrity and timing verification. In many cases, IC complexities dictate that device models are only available in SPICE or VHDL-AMS format. By adding support for multiple model formats within ICX, Mentor has given designers the greatest flexibility and efficiency possible in today’s multiple-model language environment.

"High-speed board designers are familiar with the strengths and limitations of the available model types. This new environment gives the designer the flexibility to use the most appropriate models, and even to mix and match model formats within a single net," said Joe Dalton, director of marketing, Systems Design Division, Mentor Graphics. "By adding VHDL-AMS support, which has been proven in the IC design space, Mentor continues to lead the industry in enabling system design innovation for our customers."

Multi-Lingual Simulation Support
With the addition of the ADMS simulation technology, ICX now supports models in all of the leading formats; IBIS, three different versions of SPICE (Eldo, HSPICE and Berkeley SPICE) and VHDL-AMS. This improves simulation accuracy by allowing users to utilize more detailed models (such as SPICE or VHDL-AMS) to account for today’s most complex device characteristics. The fact that this model support occurs in a single environment, without requiring the purchase of licenses for additional external simulators, makes the system design and simulation process more efficient.

VHDL-AMS (IEEE 1076.1) is a mixed-signal hardware description language (HDL) that is well-established in mixed analog/digital IC design and is now being used for high-speed buffer modeling. VHDL-AMS combines the behavioral modeling capability of IBIS with the unrestricted circuit description capabilities of SPICE, making it the best choice for devices that are difficult or impossible to model in other languages. VHDL-AMS makes it possible to incorporate analog and digital modeling information for devices with very high-speed I/O, which is especially important for emerging bus standards such as PCI Express, HyperTransport, 10G Ethernet over copper, and RapidIO.

IBIS (Input/Output Buffer Information Specification), an international standard of the Electronic Industries Alliance (EIA) supported by the EIA IBIS Open Forum, is a data specification that describes the input and output buffer of an IC and is used to model how the buffer interacts electrically with the PCB. Although the IBIS standard is well established for high-speed board-level signal integrity simulation, when IBIS models are not available, designers have to complete an additional step to either convert existing models to the IBIS format or create new ones. Mentor Graphics has worked closely with the EIA IBIS Open Forum, and ICX 3.0 supports the multi-lingual features proposed as extensions to the IBIS format. These features allow executable code within the IBIS format for greater detail and accuracy without requiring future IBIS format extensions.

Leading programmable logic device suppliers also recognize the importance of multi-language simulation support for board-level verification. "Our new high-performance Stratix devices benefit from EDA advancements in high-speed board simulation through innovative tools such as ICX 3.0. The accuracy provided by complex models helps our customers to ensure they achieve the full performance from the PLD," said Tim Southgate, vice president of tools and software marketing, Altera. "We are working with Mentor to provide device models that will work directly in the ICX 3.0 environment."

ICX 3.0 and Tau 3.0 Enhancements
ICX 3.0 and Tau 3.0 include a variety of usability, interface and capability enhancements that improve high-speed design performance. ICX 3.0 offers enhanced interfaces to Mentor’s Expedition™ and Board Station™ families of PCB design tools, including a new bi-directional interface between ICX and Expedition products, allowing users to leverage the full capabilities of the ICX tool suite’s powerful signal integrity design and verification functionality. Other key enhancements in the ICX 3.0 release include: package based ground bounce, an improved field solver, superior DC convergence, a new waveform analyzer and enhanced timing integration with Tau.

Tau’s symbolic timing analysis integration provides the premier solution for the timing verification needs of board-level circuits. Tau 3.0 represents a major update of the Tau simulation/analysis engine and provides several usability enhancements and retains more detailed information during analysis. Other key enhancements in Tau 3.0 are an improved schematic viewer for inspecting connectivity and TDML (Timing Diagram Markup Language) export for timing models.

Pricing and Availability
ICX 3.0 and Tau 3.0 are available immediately for Expedition and Board Station™ PCB design environments, and ICX customers with maintenance agreements in place as part of the WG2002 and EN2002 product releases. Pricing for ICX 3.0 starts at $45,000 and Tau 3.0 is available for $35,000. For more information, visit:

About Mentor Graphics Corporation
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,700 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site:

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