As design teams adopt nanometer process technologies they face a new set of design challenges referred to as nanometer effects. These nanometer effects include:
To analyze and manage these issues design teams must be able to accurately simulate the impact these effects will have on their design.
Historically, design teams have relied on SPICE as the âgoldenâ reference point against which accuracy is typically measured. SPICE simulators use a single voltage-based evaluation engine to simulate every entity in the design. As size and the complexity of designs increased its speed and capacity limitations surfaced. To address these limitations the next-generation of hierarchical or âFast-SPICEâ simulators were introduced. Because they still use a single voltage-based evaluation engine, these simulators address the capacity issues by breaking up a design (a single large matrix) into lots and lots of smaller matrices. While this helped address the capacity and speed issues it presented several drawbacks:
Nascim is a 3rd generation simulation engine that overcomes these limitations and drawbacks. Using patent-pending, current-based transistor, cell, and interconnect models, Nascim executes tens of thousands of times faster than SPICE, and dozens of time faster than Fast-SPICE simulators. The intelligent transformation and efficient processing of design entities (diodes, inductors, transistor, cells, interconnect, and so on) provides the capacity to handle large memory and digital logic designs. To ensure accuracy, Nascim employs a variety of evaluation engines specifically tuned to the unique simulation requirements of each design entity. Working seamlessly these engines provide the speed and accuracy needed to address the multi-faceted nanometer design issues involved in predicting actual silicon performance.