In order to post your reviews, to rank a review or to send comments to the mailing-list, you need to log in. If you have not yet created your account, please register. In case of error or omission, please send us your feedback.
NanoSpiceâ¢ is a new generation parallel statistical SPICE simulation and verification engine, which runs 10 to over 100 times faster than a traditional SPICE simulator at 100% SPICE accuracy, and can simulate large scale circuits with over ten millions of circuit elements. NanoSpiceâ¢ is fully compatible with mainstream SPICE simulators, and can handle different types of analog, digital and mixed-signal circuits. With its leading edge simulation technologies, NanoSpiceâ¢ provides designers the best verification solution with high accuracy, fast performance and large capacity, which enables designers to run more reliable simulations within a greatly shortened time-to-market.
Significantly improves simulation performance at full SPICE accuracy
8-50X faster than traditional SPICE simulators for small and mid-size circuits (Parallel mode)
16-200X faster than traditional SPICE simulators for large scale circuits (Advanced mode)
One single engine for different scale circuits that can handle over ten millions of circuit elements with no accuracy loss
Industry standard inputs and outputs
Fully compatible with HSPICE and Spectre format inputs --- VEC/VCD as digital stimulus and SPEF post-layout files --- FSDB and PSF format output waveform files
Rich circuit analysis functions
OP, DC, AC, Noise, Tran, Info, Sweep, Alter, Monte Carlo
Supports design checking functions for power, timing and noise, etc.
Supports .measure functions
Supports industry standard device models, including BSIM3V3, BSIM4, BSIMSOI , PSP, HiSIM-HV, HVMOS, HiSIM2, GP-BJT, VBIC, HICUM, Diode, JUNCAP, JFET, GAAS, R, L, C, NPORT, Transmission LINE, Transformer, VSOURCE, ISOURCE, and Controlled Sources, etc.
Supports Verilog-A and BSOURCE
Integrates with Cadence Virtuoso Analog Design Environment
Supports Cadence IC 5141 and IC 61x
Co-simulation with Cadence Verilog-XL for mixed-signal designs
Supports 64bit multi-core system : RedHat RHEL 4.x, 5.x