Comparison of Duty Cycle Generator Algorithms for SPICE Simulation of SMPS (Alexander Abramovitz)

Today circuit simulation and computer-aided design are universally accepted engineering tools and have become industry standard method of product development. Two approaches are possible for simulation of switched mode systems: cycle-by-cycle simulation and average behavior simulation. Cycle-by-cycle simulation is a quite straightforward approach. Cycle-by-cycle simulation can be performed programming the complete power electronic circuit to the simulator. Cycle-by-cycle simulation allows studding the power stage at the switching frequency scale and observing the instantaneous voltages and currents at any point in the circuit. First disadvantage of cycle-by-cycle simulation is that simulating the detailed switching process is time consuming. This is particularly true for nontrivial practical cases. The second and by far more important limitation is that the cycle-by-cycle model of a switching circuit does not lend itself to frequency response analysis. This is because the switching stage has no stable operating point and, hence, does not allow the PSPICE simulator to perform linearization and calculate the small signal gains required for frequency response analysis. Therefore, a different approach is needed to attain frequency domain simulation of the control loop.

State Space Averaging is a classical theoretical analysis method of switch-mode power electronics systems. Average modeling of the power stage can also be helpful in simulation as they can be readily implemented using PSPICE behavioral sources. Average models are continuous and, hence, can be automatically linearized by the PSPICE simulator and prepared for the frequency domain analysis. The ability to obtain the frequency response of the feedback loop allows the practicing engineer to evaluate the systemâs stability and to design the compensator network to meet the design objectives.

The distinct characteristic of SMPS is that a switched-mode stage is employed as power processor, whereas the control circuits are mostly analog where Pulse Width Modulator (PWM) is used as an interface. A typical structure of a PWM switch-mode power system (SMPS) is illustrated in Figure 1. Here, as an example, an average current mode (ACM) system is shown. There are two major challenges in simulation of a switch-mode system. The first is modeling the switcher, whereas the second is modeling the PWM modulator. To model the average behavior of switch mode power stages Switched Inductor Model (SIM) was proposed, whereas the PWM duty cycle generation process can be modeled by software Duty Cycle Generator (DCG) approach. The PWM modeling problem is that in practice the switching ripple propagates into the control loop and affects the switch on and off times. However, the average SIM model has no ripple components; therefore, in order to obtain accurate simulation results, software DCG should be programmed to predict the switching ripple effects using only the average signals of the SIM model. Another task of the DCG is to anticipate the mode changes of the power stage and calculate the correct off duty cycle in case of CCM-DCM transition.

This paper proposes a more precise, PSPICE compatible, average DCG algorithm for modeling the PWM comparator. The operation of the proposed average PWM model is demonstrated by time domain and frequency domain simulations. The paper also conducts a comparison with previously reported results. To validate the modelâs accuracy, the proposed average algorithm and its earlier counterparts are compared to cycle-by-cycle simulation. Particularly, in the discontinuous current mode the proposed algorithm shows better accuracy than earlier counterparts.